<?xml version="1.0" encoding="UTF-8"?>
 <rdf:RDF xmlns="http://purl.org/rss/1.0/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:cc="http://web.resource.org/cc/" xmlns:syn="http://purl.org/rss/1.0/modules/syndication/" xmlns:admin="http://webns.net/mvcb/">
  <channel rdf:about="http://pinboard.in">
    <title>Pinboard (aheilbut)</title>
    <link>https://pinboard.in/u:aheilbut/public/</link>
    <description>recent bookmarks from aheilbut</description>
    <items>
      <rdf:Seq>	<rdf:li rdf:resource="https://www.achronix.com/"/>
	<rdf:li rdf:resource="http://www.theplatform.net/2015/05/28/the-other-cray-launches-cpu-fpga-hybrids/"/>
	<rdf:li rdf:resource="https://forums.xilinx.com/t5/Xcell-Daily-Blog/Video-The-Three-Ages-of-the-FPGA-and-the-Age-of-the-Design/ba-p/644396"/>
	<rdf:li rdf:resource="http://blogs.technet.com/b/inside_microsoft_research/archive/2015/02/23/machine-learning-gets-big-boost-from-ultra-efficient-convolutional-neural-network-accelerator.aspx"/>
	<rdf:li rdf:resource="http://www.teradeep.com/"/>
	<rdf:li rdf:resource="http://blog.streamingcores.com/index.php?/archives/20-Programming-massively-parallel-systems-FPGA-vs.-GPU.html"/>
	<rdf:li rdf:resource="http://www.yosefk.com/blog/how-fpgas-work-and-why-youll-buy-one.html"/>
	<rdf:li rdf:resource="http://www.samplify.com/index.php"/>
	<rdf:li rdf:resource="http://www.tabula.com/index.php"/>
	<rdf:li rdf:resource="http://portal.acm.org/citation.cfm?id=1508160"/>
	<rdf:li rdf:resource="http://www.maxeler.com/content/?pg=8"/>
	<rdf:li rdf:resource="http://www.springerlink.com/content/j8k8164133u80050/"/>
	<rdf:li rdf:resource="http://spiral.net/index.html"/>
	<rdf:li rdf:resource="http://www.dilloneng.com/"/>
	<rdf:li rdf:resource="http://www.systems.ethz.ch/research/projects/avalanche"/>
	<rdf:li rdf:resource="http://www.reprogrammablenetworks.org/"/>
	<rdf:li rdf:resource="http://netfpga.stanford.edu/"/>
	<rdf:li rdf:resource="http://why%20software%20programmability%20of%20electronics%20is%20a%20game%20changer/"/>
	<rdf:li rdf:resource="http://www.synfora.com/index.html"/>
	<rdf:li rdf:resource="http://www.titanicsystems.com/"/>
	<rdf:li rdf:resource="http://www.cs.berkeley.edu/~johnw/index.html"/>
	<rdf:li rdf:resource="http://www.seas.upenn.edu/~andre/"/>
	<rdf:li rdf:resource="http://cwfletcher.net/"/>
	<rdf:li rdf:resource="http://forums.xilinx.com/xlnx/board?board.id=Virtex"/>
	<rdf:li rdf:resource="http://www.edaboard.com/"/>
	<rdf:li rdf:resource="http://www.bluespec.com/"/>
	<rdf:li rdf:resource="http://ramp.eecs.berkeley.edu/index.php?index"/>
	<rdf:li rdf:resource="http://ramp.eecs.berkeley.edu/"/>
	<rdf:li rdf:resource="http://beecube.com/"/>
	<rdf:li rdf:resource="http://www.srccomp.com/"/>
	<rdf:li rdf:resource="http://www.synective.se/index.html"/>
	<rdf:li rdf:resource="http://www.sixisinc.com/index.htm"/>
	<rdf:li rdf:resource="http://www.conveycomputer.com/index.html"/>
	<rdf:li rdf:resource="http://proteomics.ucsd.edu/"/>
	<rdf:li rdf:resource="http://www.impulseaccelerated.com/"/>
	<rdf:li rdf:resource="http://drccomputer.com/"/>
	<rdf:li rdf:resource="http://old.xtremedatainc.com/"/>
      </rdf:Seq>
    </items>
  </channel><item rdf:about="https://www.achronix.com/">
    <title>Achronix Semiconductor Corporation | Achronix Semiconductor Corporation</title>
    <dc:date>2021-02-03T19:42:39+00:00</dc:date>
    <link>https://www.achronix.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>FPGA</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:df4a28dcccf5/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:FPGA"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.theplatform.net/2015/05/28/the-other-cray-launches-cpu-fpga-hybrids/">
    <title>The Other Cray Launches CPU-FPGA Hybrids</title>
    <dc:date>2015-09-29T21:57:18+00:00</dc:date>
    <link>http://www.theplatform.net/2015/05/28/the-other-cray-launches-cpu-fpga-hybrids/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:8ba80172aa88/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="https://forums.xilinx.com/t5/Xcell-Daily-Blog/Video-The-Three-Ages-of-the-FPGA-and-the-Age-of-the-Design/ba-p/644396">
    <title>Video: The Three Ages of the FPGA and the Age of t... - Xilinx User Community Forums</title>
    <dc:date>2015-09-16T04:09:14+00:00</dc:date>
    <link>https://forums.xilinx.com/t5/Xcell-Daily-Blog/Video-The-Three-Ages-of-the-FPGA-and-the-Age-of-the-Design/ba-p/644396</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:a3c277c4ac81/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://blogs.technet.com/b/inside_microsoft_research/archive/2015/02/23/machine-learning-gets-big-boost-from-ultra-efficient-convolutional-neural-network-accelerator.aspx">
    <title>Machine Learning Gets Big Boost from Ultra-Efficient Convolutional Neural Network Accelerator - Inside Microsoft Research - Site Home - TechNet Blogs</title>
    <dc:date>2015-02-23T18:27:04+00:00</dc:date>
    <link>http://blogs.technet.com/b/inside_microsoft_research/archive/2015/02/23/machine-learning-gets-big-boost-from-ultra-efficient-convolutional-neural-network-accelerator.aspx</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>convnets fpga</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:370669929007/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:convnets"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.teradeep.com/">
    <title>TeraDeep | Embedded to Cloud Vision Analytics</title>
    <dc:date>2014-12-10T00:18:26+00:00</dc:date>
    <link>http://www.teradeep.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>lecunn deep fpga</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:288ed68e8e65/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:lecunn"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:deep"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://blog.streamingcores.com/index.php?/archives/20-Programming-massively-parallel-systems-FPGA-vs.-GPU.html">
    <title>Programming massively parallel systems (FPGA vs. GPU) - streaming cores</title>
    <dc:date>2013-06-17T21:25:39+00:00</dc:date>
    <link>http://blog.streamingcores.com/index.php?/archives/20-Programming-massively-parallel-systems-FPGA-vs.-GPU.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:ebf8a1713dcb/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.yosefk.com/blog/how-fpgas-work-and-why-youll-buy-one.html">
    <title>How FPGAs work, and why you'll buy one</title>
    <dc:date>2013-06-17T21:21:10+00:00</dc:date>
    <link>http://www.yosefk.com/blog/how-fpgas-work-and-why-youll-buy-one.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:source>https://pinboard.in/</dc:source>
<dc:identifier>https://pinboard.in/u:aheilbut/b:7a5155f46f73/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.samplify.com/index.php">
    <title>Samplify</title>
    <dc:date>2010-04-27T15:55:25+00:00</dc:date>
    <link>http://www.samplify.com/index.php</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>samplify compression streaming fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:602d07e6674c/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:samplify"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:compression"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:streaming"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.tabula.com/index.php">
    <title>Tabula.com</title>
    <dc:date>2010-04-02T18:23:09+00:00</dc:date>
    <link>http://www.tabula.com/index.php</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>PLD design fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:d55ac70e0aaf/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:PLD"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:design"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://portal.acm.org/citation.cfm?id=1508160">
    <title>Intel® atom™ processor core made FPGA-synthesizable</title>
    <dc:date>2010-02-10T21:22:08+00:00</dc:date>
    <link>http://portal.acm.org/citation.cfm?id=1508160</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga atom intel</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:69abe933d47d/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:atom"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:intel"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.maxeler.com/content/?pg=8">
    <title>Maxeler Technologies :: Front Page</title>
    <dc:date>2009-11-24T01:50:17+00:00</dc:date>
    <link>http://www.maxeler.com/content/?pg=8</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga companies uk</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:199453ddf313/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:companies"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:uk"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.springerlink.com/content/j8k8164133u80050/">
    <title>SpringerLink - Book Chapter</title>
    <dc:date>2009-11-22T18:25:23+00:00</dc:date>
    <link>http://www.springerlink.com/content/j8k8164133u80050/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>sorting fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:e7ca1ae47c94/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:sorting"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://spiral.net/index.html">
    <title>SPIRAL Project: Home Page</title>
    <dc:date>2009-11-22T06:33:48+00:00</dc:date>
    <link>http://spiral.net/index.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fft dsp fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:647bdc04c295/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fft"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:dsp"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.dilloneng.com/">
    <title>Welcome — www.dilloneng.com</title>
    <dc:date>2009-11-20T20:39:28+00:00</dc:date>
    <link>http://www.dilloneng.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>FFT IPcore fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:29ce3e90417a/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:FFT"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:IPcore"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.systems.ethz.ch/research/projects/avalanche">
    <title>Avalanche: Data Processing on Bare Metal — Systems @ ETH</title>
    <dc:date>2009-11-19T00:57:07+00:00</dc:date>
    <link>http://www.systems.ethz.ch/research/projects/avalanche</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga database</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:19405c8bc0bf/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:database"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.reprogrammablenetworks.org/">
    <title>ReprogramambleNetworks.com</title>
    <dc:date>2009-11-16T23:26:07+00:00</dc:date>
    <link>http://www.reprogrammablenetworks.org/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>networks fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:a85b2f446f3a/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:networks"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://netfpga.stanford.edu/">
    <title>NetFPGA</title>
    <dc:date>2009-11-16T23:26:01+00:00</dc:date>
    <link>http://netfpga.stanford.edu/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>networks fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:87c737e3e724/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:networks"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://why%20software%20programmability%20of%20electronics%20is%20a%20game%20changer/">
    <title>Xcell Journal</title>
    <dc:date>2009-11-12T03:24:27+00:00</dc:date>
    <link>http://why%20software%20programmability%20of%20electronics%20is%20a%20game%20changer/</link>
    <dc:creator>aheilbut</dc:creator><description><![CDATA[Jacques Benkoski - Synfora
]]></description>
<dc:subject>fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:2a1c622a7259/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.synfora.com/index.html">
    <title>Synfora</title>
    <dc:date>2009-11-12T03:19:16+00:00</dc:date>
    <link>http://www.synfora.com/index.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>synfora esl synthesis fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:79abd14913f7/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:synfora"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:esl"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:synthesis"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.titanicsystems.com/">
    <title>titan-ic: Integrated Systems</title>
    <dc:date>2009-11-11T18:49:40+00:00</dc:date>
    <link>http://www.titanicsystems.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga textanalysis</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:a5a1d0cc13e5/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:textanalysis"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.cs.berkeley.edu/~johnw/index.html">
    <title>John Wawrzynek | U.C. Berkeley EECS</title>
    <dc:date>2009-10-19T03:05:31+00:00</dc:date>
    <link>http://www.cs.berkeley.edu/~johnw/index.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>people berkeley cs architecture fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:5f836c24891c/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:people"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:berkeley"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:cs"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:architecture"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.seas.upenn.edu/~andre/">
    <title>Andre DeHon</title>
    <dc:date>2009-10-19T03:04:56+00:00</dc:date>
    <link>http://www.seas.upenn.edu/~andre/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>people cs architecture fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:d31dfed7839c/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:people"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:cs"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:architecture"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://cwfletcher.net/">
    <title>Christopher Fletcher - Home</title>
    <dc:date>2009-10-19T02:57:58+00:00</dc:date>
    <link>http://cwfletcher.net/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>people berkeley fpga nolan mcmc</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:d0490e37c54b/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:people"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:berkeley"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:nolan"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:mcmc"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://forums.xilinx.com/xlnx/board?board.id=Virtex">
    <title>Virtex® Family FPGAs - Xilinx User Community Forums</title>
    <dc:date>2009-10-17T21:43:58+00:00</dc:date>
    <link>http://forums.xilinx.com/xlnx/board?board.id=Virtex</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>xilinx fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:07e68886838e/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:xilinx"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.edaboard.com/">
    <title>EDAboard.com - Electronics Forum, Projects, Schematics, Circuits, Books, Microcontrollers, ASIC, DSP, RTOS, RF, Digital Design, Analog Design, Programming, Circuits, Service Manuals</title>
    <dc:date>2009-10-17T21:02:29+00:00</dc:date>
    <link>http://www.edaboard.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>eda verilog fpga electronics</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:f74b75b3e06c/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:eda"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:verilog"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:electronics"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.bluespec.com/">
    <title>Bluespec, Inc.</title>
    <dc:date>2009-10-15T19:30:15+00:00</dc:date>
    <link>http://www.bluespec.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>esl synthesis hardware fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:efdce66c65e5/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:esl"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:synthesis"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:hardware"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://ramp.eecs.berkeley.edu/index.php?index">
    <title>RAMP - Research Accelerator for Multiple Processors</title>
    <dc:date>2009-09-12T17:42:26+00:00</dc:date>
    <link>http://ramp.eecs.berkeley.edu/index.php?index</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>multicore simulation fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:10f79dc9283d/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:multicore"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:simulation"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://ramp.eecs.berkeley.edu/">
    <title>RAMP - Research Accelerator for Multiple Processors</title>
    <dc:date>2009-08-24T23:42:50+00:00</dc:date>
    <link>http://ramp.eecs.berkeley.edu/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:de26ffd28a0f/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://beecube.com/">
    <title>BEEcube - High-performance Reconfigurable Processing Systems</title>
    <dc:date>2009-08-24T23:42:39+00:00</dc:date>
    <link>http://beecube.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:64ab19247cee/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.srccomp.com/">
    <title>SRC Computers -- High Performance Reconfigurable Computing Systems</title>
    <dc:date>2009-08-17T17:02:56+00:00</dc:date>
    <link>http://www.srccomp.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga startup architecture cray reconfigurable</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:2165fa88d502/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:startup"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:architecture"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:cray"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:reconfigurable"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.synective.se/index.html">
    <title>Synective Labs</title>
    <dc:date>2009-08-17T16:41:25+00:00</dc:date>
    <link>http://www.synective.se/index.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga consultants</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:13a2738ce2c8/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:consultants"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.sixisinc.com/index.htm">
    <title>siXis next-generation embedded computing modules power the future of electronics.</title>
    <dc:date>2009-08-17T05:01:38+00:00</dc:date>
    <link>http://www.sixisinc.com/index.htm</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>interconect integration fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:bc009eb16bd5/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:interconect"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:integration"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.conveycomputer.com/index.html">
    <title>Convey Home</title>
    <dc:date>2009-08-17T01:23:32+00:00</dc:date>
    <link>http://www.conveycomputer.com/index.html</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga convey architecture hardware wallach</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:28d2bb822a82/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:convey"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:architecture"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:hardware"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:wallach"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://proteomics.ucsd.edu/">
    <title>CSE Bioinformatics Group</title>
    <dc:date>2009-08-17T01:04:22+00:00</dc:date>
    <link>http://proteomics.ucsd.edu/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>massspec convey fpga proteomics pevzner algorithms</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:520044511fb7/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:massspec"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:convey"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:proteomics"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:pevzner"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:algorithms"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://www.impulseaccelerated.com/">
    <title>Impulse Accelerated Technologies - Software Tools for an Accelerated World</title>
    <dc:date>2009-08-17T00:24:03+00:00</dc:date>
    <link>http://www.impulseaccelerated.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga compiles</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:f4cef8950392/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:compiles"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://drccomputer.com/">
    <title>DRC Company Overview</title>
    <dc:date>2009-08-17T00:22:53+00:00</dc:date>
    <link>http://drccomputer.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:fd49e16aae5e/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
<item rdf:about="http://old.xtremedatainc.com/">
    <title>XtremeData, Inc.</title>
    <dc:date>2009-08-16T22:10:50+00:00</dc:date>
    <link>http://old.xtremedatainc.com/</link>
    <dc:creator>aheilbut</dc:creator><dc:subject>fpga</dc:subject>
<dc:identifier>https://pinboard.in/u:aheilbut/b:e028d553a1e8/</dc:identifier>
<taxo:topics><rdf:Bag>	<rdf:li rdf:resource="https://pinboard.in/u:aheilbut/t:fpga"/>
</rdf:Bag></taxo:topics>
</item>
</rdf:RDF>